Quantum Architecture Research Papers

The Quantum Architecture Research Center
Paper Abstract

Running a Quantum Circuit at the Speed of Data
Nemanja Isailovic, Mark Whitney, Yatish Patel and John Kubiatowicz.

Appears in Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008).

We analyze circuits for kernels from popular quantum computing applications, characterizing the hardware resources necessary to take ancilla preparation off the critical path. The result is a chip entirely dominated by ancilla generation circuits. To address this issue, we introduce optimized ancilla factories and analyze their structure and physical layout for ion trap technology. We introduce a new quantum computing architecture with highly concentrated data-only regions surrounded by shared ancilla factories. The results are a reduced dependence on costly teleportation, more efficient distribution of generated ancillae and more than five times speedup over previous proposals.

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Last modified on 03/15/2008 by Nemanja Isailovic.